QPSK Modulation and Demodulation System Using Phase-Locked Loop

This documentation discusses the implementation of a QPSK (Quadrature Phase Shift Keying) modulation and demodulation system for signal transmission. The program utilizes a Phase-Locked Loop (PLL) carrier recovery circuit to maintain signal stability and synchronization during demodulation. The system outputs constellation diagrams that visually represent signal characteristics, allowing for comprehensive analysis of signal quality and modulation performance. Key implementation aspects include digital signal processing algorithms for QPSK modulation, where two bits are encoded per symbol using four different phase shifts (0°, 90°, 180°, 270°). The PLL implementation employs a phase detector, loop filter, and voltage-controlled oscillator (VCO) to track and recover the carrier frequency from the received signal. The constellation diagram generation involves plotting the in-phase (I) and quadrature (Q) components of the demodulated signal, providing insights into signal-to-noise ratio, phase errors, and symbol decision boundaries. Through this implementation, users can better understand and analyze information transmission processes, modulation techniques, and demodulation procedures in digital communication systems. The enhanced documentation aims to clearly present these key concepts and provide deeper insights into QPSK communication technology for technical audiences.