Active Disturbance Rejection Controller (ADRC) Implementation Routine for Linear Active Disturbance Rejection Control (LADRC)

Resource Overview

Implementation example of Active Disturbance Rejection Controller (ADRC) and Linear Active Disturbance Rejection Controller (LADRC), featuring disturbance estimation and compensation mechanisms with code implementation insights.

Detailed Documentation

Active Disturbance Rejection Controller (ADRC) is an advanced control algorithm that effectively handles system uncertainties and external disturbances through its unique disturbance estimation and compensation mechanism. The core concept involves treating both model uncertainties and external disturbances as a total disturbance, which is then estimated and compensated in real-time using an Extended State Observer (ESO). In code implementation, the ESO typically requires designing observer gain matrices and implementing state update equations using difference equations or integration methods.

Linear Active Disturbance Rejection Controller (LADRC) represents a simplified version of ADRC that employs linear design methods to reduce implementation complexity. A typical implementation consists of three key components: Tracking Differentiator (TD) for arranging the transition process, Linear Extended State Observer (LESO) for estimating system states and total disturbance, and Linear State Error Feedback (LSEF) control law for generating control signals. Programming-wise, TD can be implemented using discrete-time filters to generate smooth reference signals and their derivatives, while LESO often utilizes linear observer structures with carefully tuned bandwidth parameters.

During the design process, the TD component generates smooth reference signals and their differential signals according to practical requirements, avoiding overshoot issues caused by direct step signal tracking. LESO estimates system disturbances by extending them as new states, eliminating the need for precise plant model knowledge. LSEF employs a classical error feedback structure where controller parameters are configured through bandwidth parameterization techniques to achieve desired dynamic performance. In practice, these components are typically implemented as discrete-time difference equations with sampling time considerations.

The advantage of this controller lies in its low requirement for system model accuracy and strong disturbance rejection capability, making it particularly suitable for control scenarios involving model uncertainties, parameter variations, and external disturbances. Code implementation often focuses on parameter tuning methods and discrete-time realization using z-transform techniques.